A long-recognized important objective in the constant advancement of monolithic integrated circuit (IC) technology is the scaling down of IC dimensions. Such scaling down of IC dimensions reduces area capacitance and is critical to obtaining higher speed performance of integrated circuits. Moreover, reducing the area of an IC die leads to higher yield in IC fabrication. Such advantages are a driving force to constantly scale down IC dimensions. However, as IC dimensions are scaled down, the distance between interconnect structures decreases, and it is necessary, therefore, to minimize the dielectric constant of the insulating layer in which the interconnects are formed, so as to maximize speed performance of the integrated circuit and minimize power dissipation and cross-talk between interconnect structures. For this reason, porous, ultra low-k (ULK) materials are now being routinely integrated in interconnect stacks.
One of the primary concerns of integrating porous ULK materials in interconnect stacks is the role of porosity during manufacturing and its effect on reliability performance. It is well known that the creation of pores in dielectric materials, to reduce dielectric constant, creates problems with the mechanical and electrical integrity of the structures during subsequent processing like barrier and metal deposition, chemical mechanical polishing (CMP), thermal cycling, and packaging. Penetration of material during processing should be avoided at all cost. To mitigate the negative effects of these pores, approaches are needed to seal the pores in the metal low-k interface. The modification of the porous low-k metal interface is commonly referred to as “pore sealing”. Pore sealing is required to prevent:
diffusion of precursors from chemical vapor deposition (CVD) or atomic layer deposition (ALD) barriers into the ULK that lowers dielectric breakdown and increases leakage current,
moisture uptake from ambient conditions after etch being adsorbed into the ULK,
penetration of cleaning solutions used for striping etch residues and cleaning copper Cu via bottom,
easy Cu penetration into the ULK during thermal stressing due to discontinuous barrier deposition on porous ULK sidewalls.
Numerous approaches have been proposed in literature to prevent diffusion of chemicals into the porous dielectric. These approaches can be classified into three major classes, as follows:
Firstly, very thin liners can be used to block the pores. These liners can either be deposited by plasma enhanced chemical vapor deposition (PECVD), e.g., PECVD SiC, spin-coating, e.g., benzocyclobutene (BCS) polymers, or by CVD, e.g., poly p xylilene. It has been shown that at least a 10 nm PECVD SiC liner is needed to seal pores, thereby negatively acting on the effective dielectric constant (k effective) and/or the Cu resistivity. If really thick liners are needed to seal the pores, a relative large fraction of the inter metal dielectric has a large k-value having a negative impact on the overall k-value. These polymeric films are partly penetrating into the pores leaving a uniform film behind. The disadvantage is that either selectivity is required or that the bottom of vias need to be opened by a plasma etch that could destroy/remove completely the deposited film. Normally, etch and strip recipes are optimized to remove completely polymeric residues to improve on via resistance, yield and interconnect reliability. Controlling a certain amount of polymers at via level is therefore difficult to achieve. Moreover, extra integration steps are making the whole integration rather expensive.
In literature, plasma surface treatments have been proposed extensively to modify and restructure the interface and, thereby, to perform pore sealing. The plasma is either based on remote reactive plasmas with N2, H2 and O2 gases and mixtures thereof or based on reactive ion etching. Pore sealing has also been accomplished by using etch by-products. Other proposals have employed gas cluster ion beams (GCIB) to density and close the sidewall surface. GCIB is a technique where clusters of high-energy gas molecules impact on the surface, break apart, and transfer their momentum in lateral direction. The surface modification is based on a densification of the porous material at the sidewall in such a way that diffusion of reactants does not occur anymore. A certain need of inertia and chemical reactivity is needed to accomplish this restructuring. The danger is always that the line dimensions etched into the fragile dielectrics cannot be kept. Especially for materials that have a large porosity and a large pore diameter the amount of material that needs to be restructured/redeposited is not enough to close the surface. Moreover, upon using a plasma the risk is imminent that the dielectric permittivity of the ULK is altered.
In summary, the liner and the surface modification techniques both rely on deposition and/or redeposition of material thereby potentially modifying the dielectric constant of the low-k material.
A third relatively new method to prevent diffusion is to create the porous structure after barrier and Cu metal deposition. In spin-on dielectrics the porosity is normally created directly after low-k deposition in a cure step. In order to do so, a degradable molecule or polymer called “porogen” is added to the low-k spin-on formula and is decomposed/evaporated during a cure step thus leaving a porous structure behind. The clear advantage of this method, which is referred to in, for example, U.S. Pat. No. 6,528,409, is that via cleaning liquids cannot penetrate into the porous low-k during strip and that ALD precursors cannot diffuse into the dielectric during barrier deposition. The disadvantage is that the ULK film is not completely cured yet and that additional shrink could cause mechanical stress during integration. Another significant drawback is that the so-called solid first approach cannot be applied to PECVD SiOC deposited low-k materials. Nowadays, PECVD is the preferred deposition technique as opposed to spin-on approaches. Therefore, a pore sealing approach for ULK dielectrics deposited with PECVD is needed that avoids the problems associated with liners and surface treatments and uses that advantages of the solid first approach.